Many electronic systems include circuits, such as switching power converters or transformers that interface with a dimmer. The interfacing circuits deliver power to a load in accordance with the dimming level set by the dimmer. For example, in a lighting system, dimmers provide an input signal to a lighting system. The input signal represents a dimming level that causes the lighting system to adjust power delivered to a lamp, and, thus, depending on the dimming level, increase or decrease the brightness of the lamp. Many different types of dimmers exist. In general, dimmers generate an output signal in which a portion of an alternating current (“AC”) input signal is removed or zeroed out. For example, some analog-based dimmers utilize a triode for alternating current (“triac”) device to modulate a phase angle of each cycle of an alternating current supply voltage. This modulation of the phase angle of the supply voltage is also commonly referred to as “phase cutting” the supply voltage. Phase cutting the supply voltage reduces the average power supplied to a load, such as a lighting system, and thereby controls the energy provided to the load. A particular type of phase-cutting dimmer is known as a trailing-edge dimmer A trailing-edge dimmer phase cuts from the end of an AC cycle, such that during the phase-cut angle, the dimmer is “off” and supplies no output voltage to its load, but is “on” before the phase-cut angle and in an ideal case passes a waveform proportional to its input voltage to its load.
FIG. 1 depicts a lighting system 100 that includes a trailing-edge, phase-cut dimmer 102 and a lamp 142. FIG. 2 depicts example voltage and current graphs associated with lighting system 100. Referring to FIGS. 1 and 2, lighting system 100 receives an AC supply voltage VSUPPLY from voltage supply 104. The supply voltage VSUPPLY, indicated by voltage waveform 200, is, for example, a nominally 60 Hz/110 V line voltage in the United States of America or a nominally 50 Hz/220 V line voltage in Europe. Trailing edge dimmer 102 phase cuts trailing edges, such as trailing edges 202 and 204, of each half cycle of supply voltage VSUPPLY. Since each half cycle of supply voltage VSUPPLY is 180 degrees of the supply voltage VSUPPLY, the trailing edge dimmer 102 phase cuts the supply voltage VSUPPLY at an angle greater than 0 degrees and less than 180 degrees. The phase cut, input voltage VΦ—DIM to lamp 142 represents a dimming level that causes the lighting system 100 to adjust power delivered to lamp 142, and, thus, depending on the dimming level, increase or decrease the brightness of lamp 142.
Dimmer 102 includes a timer controller 110 that generates dimmer control signal DCS to control a duty cycle of switch 112. The duty cycle of switch 112 is a pulse width (e.g., times t1−t0) divided by a period of the dimmer control signal (e.g., times t3−t0) for each cycle of the dimmer control signal DCS. Timer controller 110 converts a desired dimming level into the duty cycle for switch 112. The duty cycle of the dimmer control signal DCS is decreased for lower dimming levels (i.e., higher brightness for lamp 142) and increased for higher dimming levels. During a pulse (e.g., pulse 206 and pulse 208) of the dimmer control signal DCS, switch 112 conducts (i.e., is “on”), and dimmer 102 enters a low resistance state. In the low resistance state of dimmer 102, the resistance of switch 112 is, for example, less than or equal to 10 ohms. During the low resistance state of switch 112, the phase cut, input voltage VΦ—DIM tracks the input supply voltage VSUPPLY and dimmer 102 transfers a dimmer current iDIM to lamp 142.
When timer controller 110 causes the pulse 206 of dimmer control signal DCS to end, dimmer control signal DCS turns switch 112 off, which causes dimmer 102 to enter a high resistance state (i.e., turns off). In the high resistance state of dimmer 102, the resistance of switch 112 is, for example, greater than 1 megaohm. Dimmer 102 includes a capacitor 114, which charges to the supply voltage VSUPPLY during each pulse of the dimmer control signal DCS. In both the high and low resistance states of dimmer 102, the capacitor 114 remains connected across switch 112. When switch 112 is off and dimmer 102 enters the high resistance state, the voltage VC across capacitor 114 increases (e.g., between times t1 and t2 and between times t4 and t5). The rate of increase is a function of the amount of capacitance C of capacitor 114 and the input impedance of lamp 142. If effective input resistance of lamp 142 is low enough, it permits a high enough value of the dimmer current iDIM to allow the phase cut, input voltage VΦ—DIM to decay to a zero crossing (e.g., at times t2 and t5) before the next pulse of the dimmer control signal DCS.
Dimming a light source with dimmers saves energy when operating a light source and also allows a user to adjust the intensity of the light source to a desired level. However, conventional dimmers, such as a trailing-edge dimmer, that are designed for use with resistive loads, such as incandescent light bulbs, often do not perform well when supplying a raw, phase modulated signal to a reactive load such as a power converter or transformer, as is discussed in greater detail below.
FIG. 3 depicts a lighting system 100 that includes a lamp assembly 142 with controller 112 for providing compatibility between a low-power lamp comprising LEDs 132 and other elements of lighting system 100, as is known in the art. As shown in FIG. 3, lighting system 100 may include a voltage supply 104, a dimmer 102, and a lamp assembly 142. Voltage supply 104 may generate a supply voltage VSUPPLY that is, for example, a nominally 60 Hz/110 V line voltage in the United States of America or a nominally 50 Hz/220 V line voltage in Europe.
Dimmer 102 may comprise any system, device, or apparatus for generating a dimming signal to other elements of lighting system 100, the dimming signal representing a dimming level that causes lighting system 100 to adjust power delivered to a lamp, and, thus, depending on the dimming level, increase or decrease the brightness of lamp assembly 142. Thus, dimmer 102 may include a trailing-edge dimmer similar to that depicted in FIG. 1, or any other suitable dimmer.
Lamp assembly 142 may comprise any system, device, or apparatus for converting electrical energy (e.g., delivered by dimmer 102) into photonic energy (e.g., at LEDs 132). For example, lamp assembly 142 may comprise a multifaceted reflector form factor (e.g., an MR16 form factor) with a lamp comprising LEDs 132. As shown in FIG. 3, lamp assembly 142 may include a bridge rectifier 134, a power converter 136, a load capacitor 154, a controller 112, and a dissipative network comprising a resistor 122 and switch 124.
Bridge rectifier 134 may comprise any suitable electrical or electronic device as is known in the art for converting the whole of alternating current voltage signal VΦ—DIM into a rectified voltage signal vREC having only one polarity.
Power converter 136 may comprise any system, device, or apparatus configured to convert an input voltage (e.g., vREC) to a different output voltage (e.g., vOUT) wherein the conversion is based on a control signal (e.g., a pulse-width modulated control signal communicated from controller 112). Accordingly, power converter 136 may comprise a boost converter, a buck converter, a boost-buck converter, or other suitable power converter.
Output capacitor 154 may comprise any system, device, or apparatus to store energy in an electric field. Output capacitor 154 may be configured such that it stores energy generated by power converter 136 in the form of the voltage vOUT.
LEDs 132 may comprise one or more light-emitting diodes configured to emit photonic energy in an amount based on the voltage vOUT across the LEDs 132.
Controller 112 may comprise any system, device, or apparatus configured to determine one or more characteristics of voltage vREC present at the input of power converter 136 and control an amount of current iREC drawn by power converter 136 or dissipated through resistor 122 based on such one or more characteristics of voltage vREC.
A typical trailing-edge dimmer often requires a low-impedance input path when its dimmer switch (e.g., switch 112) opens. This low impedance path allows it to charge an internal capacitor (e.g., capacitor 114) of the trailing-edge dimmer, and thus to also appear to an LED lamp as a trailing-edge dimmer. In addition, such low impedance path may “expose” the trailing edge of the dimmer of a controller (e.g., controller 112), such that the controller may detect occurrence of the trailing edge in order to operate lamp assembly 142 in a desired manner. Accordingly, in lighting system 100, controller 112 may be configured to enable (e.g., activate, close, turn on, etc.) switch 124 via signal ENABLE to apply a low-impedance path comprising resistor 122 during a period of time proximate in time to the trailing edge in order to provide such required low impedance at the trailing edge. However, such low impedance cannot be applied all of the time, as it may result in high power dissipation in lamp assembly 142 compared to its wattage rating.
Although not depicted in FIG. 3, in some embodiments, a lighting system 100 may include a transformer (e.g., an electronic transformer) coupled between dimmer 102 and lamp assembly 142.
FIGS. 4A and 4B illustrate example voltage and current graphs associated with lighting system 100 shown in FIG. 3, and depicts traditional approaches to providing a low impedance to a trailing-edge dimmer at the trailing-edge of the dimmer. In such approaches, switch 124 may be enabled, as shown in waveform 402 for enable signal ENABLE, for a period of time ending at an estimated end of the conduction angle at time tend of the trailing-edge dimmer and beginning at a fixed time offset toffset from time tend. The time tend may be estimated by determining when rectified voltage signal vREC crosses below a predetermined threshold voltage VT. Accordingly, the low impedance of the dissipation network comprising resistor 122 and switch 124 is not turned on at all times. However, different trailing-edge dimmers may have different capacitances of their charging capacitors 114. Thus, the fixed offset toffset must typically be set for a dimmer with the largest charging capacitor capacitance supported by a lamp assembly, as a fall time of the trailing edge of rectified voltage signal vREC is directly proportional to dimmer capacitance. Thus, while these existing approaches may minimize power dissipation in resistor 122 when a lamp assembly 142 is coupled to a dimmer 102 having a large charging capacitor capacitance, such existing approaches may lead to high power dissipation in resistor 122 when a lamp assembly 142 is coupled to a dimmer 102 having a smaller charging capacitor capacitance. For example, in lighting systems 100 having a dimmer 102 with a relatively small capacitance (FIG. 4A) the time period toverlap1 in which enable signal ENABLE may overlap with the conduction period of dimmer 102 (e.g., periods tcond) may be larger than an analogous time period toverlap2 in lighting systems 100 having a dimmer 102 with a larger capacitance (FIG. 4B), potentially resulting in higher power dissipation in lamp assembly 142 when coupled to a dimmer 102 with smaller capacitance.